1. Field of the Invention
The present invention relates to frame aligners for use in telecommunication exchanges handling digital information in, for example, time division multiplex form.
2. Description of the Related Art
In large national telecommunication networks e.g. employing telephone exchanges, the transmission of digital information or data over highways or junctions between the exchanges can not be handled on a completely synchronised basis by relying on the overall network synchronisation arrangements.
Inevitably, during the transmission of data over a high-way or junction between exchanges in the network, the phase relationship between the multiplex of the transmitted data on the highway or junction, and the multiplex at the receiving exchange varies in accordance with a permissable drift (say eight bits of data) which is related to the frequency of the clock systems of the respective exchanges.
The frame aligner is designed to compensate for this drift, and prevents loss of transmitted data by ensuring that the multiplex at the receiving exchange is controlled to be in synchronism with the multiplex on the highway or junction.
A 32-channel pulse code modulated (p.c.m.) frame aligner comprising a "single chip" for use in digital switching systems is disclosed in British Specification No. 2063624. In this aligner in order to align an incoming 256-bit p.c.m. data stream to the local exchange timing, the aligner incorporates five shift registers each of 128 bits in length (one half-frame of data) and a slip mechanism which monitors the incoming clock and exchange clock rates to ensure that the READ and WRITE counters, which control the data being written-to and read-from the shift registers do not concurrently select the same shift register section.
This aligner will only operate satisfactorily between systems which are compatible i.e. 32 channel system incoming and 32 channel outgoing. Such an aligner will not therefore align data between incompatible systems.